QFN Package: Types, Sizes, Footprint and Soldering Guide

You have picked a regulator or microcontroller in a QFN package, and now the layout, stencil and inspection plan all depend on a pad you cannot see after assembly. A QFN (quad flat no-lead) package is a surface-mount IC package with flat terminals on the underside along all four edges, usually with a large exposed pad in the center for heat and ground. It is small, has short electrical paths and conducts heat well into the board, but its joints are hidden, so the footprint, stencil and inspection have to be planned rather than fixed afterwards. This guide covers QFN vs DFN, standard sizes, footprint and stencil rules from TI’s application note, and how QFN joints are inspected and accepted. If you are building a prototype, our quick-turn PCB assembly team works from these same rules.

1. What Is a QFN Package?

QFN stands for quad flat no-lead. “Quad” means terminals on all four sides, “flat” means the package sits flat on the board, and “no-lead” means there are no legs; the terminals are metal pads flush with the package bottom and edges. Most QFNs also have an exposed die pad (thermal pad) in the center.

• Terminals: soldered to matching lands on the PCB, with no visible lead to inspect.
• Exposed pad: soldered to a copper land with thermal vias, carrying heat into the board and often serving as ground.
• Low profile: the package sits close to the board, which keeps electrical paths short.

What does the exposed pad connect to?

Usually ground, but check the IC datasheet: some devices require it to be left floating or tied to another net. On the PCB, it lands on copper connected to inner planes through thermal vias (section 5).

2. QFN vs DFN, QFP and BGA: What Is the Difference?

The difference is where the terminals are and whether you can see them. NXP defines DFN as having contacts along two opposite sides and QFN along all four sides; both are leadless (NXP AN1902).

Package	Terminals	Visible joints after assembly	Typical use
DFN (also called SON)	Two opposite sides, no leads	Edge only, if wettable flank	Small regulators, MOSFETs, low pin count
QFN	All four sides, no leads	Edge only, if wettable flank	Microcontrollers, PMICs, RF ICs
QFP	Gull-wing leads on four sides	Yes	Easier hand soldering and inspection, larger area
BGA	Solder balls in a grid underneath	No	High pin count processors and FPGAs

When should you choose QFN over BGA?

When the pin count fits around the perimeter. QFN needs no escape routing through a ball grid and is easier to place and rework than a BGA. Once the I/O count outgrows the perimeter, BGA becomes the practical choice.

3. What Are the Types of QFN Packages?

QFNs differ mainly in how the terminal edge is finished, whether there is an exposed pad, and the body size and pitch.

Variation	What changes	Why it matters
Standard (pull-back or flush) terminal	Terminal ends at or behind the package edge	No reliable side fillet; joints need X-ray to verify
Wettable flank (step-cut or dimple)	Terminal edge is cut or dimpled and plated	Forms a visible side fillet that AOI can check
With exposed pad	Central die pad on the bottom	Better heat transfer; needs thermal vias and stencil control
Without exposed pad	Terminals only	Less heat transfer; simpler stencil
Body size and pitch	Body from 3 × 3 mm upward; pitch such as 0.5 or 0.65 mm	Sets land width, mask design and stencil thickness

NXP’s AN1902 describes the step-cut and dimple features that promote a visible fillet. Wettable flanks matter most in high-volume automotive builds, where TI describes 100% automated visual inspection after assembly as typically required (TI SNVA804).

4. What Are the Standard QFN Sizes?

Most QFN outlines are registered under JEDEC MO-220. NXP’s package catalogue lists MO-220-referenced QFNs with square bodies of 3, 4, 5, 6, 7 and 8 mm (for example, SOT758-2 at 3 × 3 mm and SOT684-1 at 8 × 8 mm), and Amkor’s MicroLeadFrame datasheet lists common bodies of 3 × 3, 5 × 5, 7 × 7, 8 × 8 and 10 × 10 mm.

The body size does not fix the footprint. Pitch, terminal length, exposed-pad size and tolerances vary between package variations, even at the same body size, so always take the land pattern from the exact package drawing in the IC datasheet.

5. How Do You Design the PCB Footprint for a QFN?

Start from the package drawing and apply TI’s land-pattern rules. TI’s application note SLUA271C (revised December 2023) recommends non-solder-mask-defined (NSMD) lands and gives these starting values:

Feature	TI SLUA271C guideline
Terminal land length	Package land length + at least 0.10 mm, with 0.05 mm heel extension
Terminal land width	Terminal width + at least 0.05 mm total (at 0.5 mm pitch, land width no more than 0.28 mm)
Thermal land	Same size as the package exposed pad
Gap between thermal land and terminal lands	At least 0.2 mm
Solder mask opening (pitch ≥ 0.65 mm)	Land + 0.10–0.14 mm
Solder mask at 0.5 mm pitch	Gang (row) opening, with clearance no more than 0.05 mm

Keep traces and vias clear of the area near pin 1 where the package may have an index feature, and keep the thermal-land-to-terminal gap, or the paste on the center pad can bridge to the inner ends of the terminals. If your PCB layout library uses a generic QFN footprint, check it against these rules before release.

6. How Should the Stencil and Thermal Vias Be Designed?

Use a 0.100–0.150 mm stencil (0.125 mm is typical), print the terminals 1:1, and split the exposed-pad aperture into several smaller windows that cover 50–70% of the pad, according to TI SLUA271C. The split windows control solder volume, let flux gas escape, and stop the part from floating on a thick layer of solder.

Item	TI SLUA271C starting point
Stencil thickness	0.100–0.150 mm, typically 0.125 mm
Terminal apertures	1:1 with the lands; at 0.5 mm pitch or finer, may be reduced about 20% if paste squeezes out
Exposed-pad paste coverage	50–70% of the pad area, in multiple windows
Thermal via pitch	About 1.0 mm
Thermal via drill	0.3 mm as a starting point
Via tenting (top side)	Mask diameter = hole diameter + 0.1 mm

Should the thermal vias be filled, plugged or tented?

Open vias in the exposed pad can wick solder away from the joint. Plugging stops that; tenting can trap air that later shows up as voids, so review it with your fabricator. The via count and pitch are a starting point; the real number depends on how much heat the device dissipates.

7. How Do You Solder a QFN?

In production, with solder paste and reflow. The paste is printed through the stencil, the part is placed, and the board goes through a standard SMT assembly reflow profile. Most QFN defects come from the print: too much paste on the center pad lifts the part, too little leaves voids or opens.

Can you solder a QFN by hand?

Yes, with hot air and paste, but not with an iron alone, because the center pad is underneath. Tin the lands lightly, apply flux, place the part, and heat until it settles. Check for bridges at the edges with magnification, and remember that the center pad cannot be seen; for anything beyond a prototype, use stencil and reflow.

8. How Are QFN Joints Inspected and Accepted?

With X-ray for hidden joints and the center pad, and AOI for the edges when the part has wettable flanks.

• Center-pad voiding: TI recommends no more than 50% voiding on the exposed pad for high-power applications, checked by X-ray. TI’s discussion of 25% voiding concerns thermal performance on a test board, not a universal acceptance limit.
• Acceptance standard: IPC-7093A (October 2020) covers the design, assembly, inspection and reliability of bottom-termination components such as QFN, DFN and SON, and points to J-STD-001 and IPC-A-610 for accept/reject criteria. IPC-A-610J (March 2024) has a dedicated bottom-termination section. Specify the IPC-A-610 class and revision in your order.
• Side fillets: do not require a side fillet on a QFN that is not built to form one; only wettable-flank parts reliably show it.

How reliable are QFN joints?

Reliable when the design and process fit the application, but sensitive to thermal cycling. NASA JPL’s 2014 QFN body of knowledge names low standoff, hidden joints and thermal-cycle sensitivity as the main risks, and recommends following the supplier’s guidance plus testing for the specific application.

9. How Do You Rework a QFN?

Remove and replace it with hot air or a rework station, then rebuild the joint with fresh paste. Because the center pad carries most of the heat, preheating the board from below makes removal easier and reduces stress on nearby parts.

1. Preheat the board and remove the part with hot air.
2. Clean the lands and remove old solder evenly.
3. Apply paste with a mini-stencil, or flux plus a thin tinned layer.
4. Place, reflow and inspect with X-ray if the center pad matters thermally.

How can we help with QFN boards?

Send your Gerber files, BOM and the QFN datasheets, and we will review the footprints, exposed-pad paste windows and thermal vias against these guidelines in the quote. We quote within 24 hours with no minimum order quantity, and 2–4 layer FR-4 prototype boards are free.

Conclusion

A QFN package gives you a small, thermally efficient part with hidden joints. Take the footprint from the exact package drawing, follow TI’s land, mask and stencil rules, split the exposed-pad paste into windows covering 50–70% of the pad, and plan X-ray for the center pad. Choose wettable-flank parts if your customer needs AOI-visible joints, and state the IPC-A-610 class and revision on the order. Send your files and contact us today for a QFN footprint review with your quote.

FAQ

What does QFN stand for? Quad flat no-lead: a leadless surface-mount package with terminals along all four sides of its underside.

What is the difference between QFN and DFN packages? A DFN has terminals on two opposite sides; a QFN has them on all four sides. Both are leadless and usually have an exposed center pad.

How do I solder a QFN chip? In production, print paste through a stencil and reflow it. By hand, use hot air with paste or a thin tinned layer, because the center pad cannot be reached with an iron.

What is the best way to prevent QFN voiding? Split the exposed-pad stencil aperture into several windows covering 50–70% of the pad, and plug thermal vias or review tented vias with your fabricator.

What is a wettable flank QFN? A QFN whose terminal edges are step-cut or dimpled and plated so solder forms a visible side fillet. That lets AOI check the joints, which matters in high-volume automotive builds.

What is the difference between QFN and QFP packages? A QFP has gull-wing leads you can see and solder by hand; a QFN is leadless with terminals underneath. QFN is smaller and conducts heat better through its exposed pad, while QFP is easier to inspect and rework.